ADuC7060
RESET
RSTCLR Register
There are four kinds of reset: external reset, power-on-reset,
watchdog reset, and software reset. The RSTSTA register
indicates the source of the last reset and can be written by user
code to initiate a software reset event.
The bits in this register can be cleared to 0 by writing to the
RSTCLR MMR at 0xFFFF0234. The bit designations in
RSTCLR mirror those of RSTSTA. These registers can be used
Name:
Address:
Access:
Function:
RSTCLR
0xFFFF0234
Write only
This 8-bit write only register clears the corres-
ponding bit in RSTSTA.
during a reset exception service routine to identify the source of
the reset. The implications of all four kinds of reset events are
tabulated in Table 29.
RSTSTA Register
Table 28. RSTSTA/RSTCLR MMR Bit Designations
Bit Description
7 to 4 Not used. These bits are not used and always
read as 0.
Name:
RSTSTA
3
External reset.
Automatically set to 1 when an external reset
Address:
Default value:
0xFFFF0230
Depends on type of reset
occurs.
This bit is cleared by setting the corresponding bit
in RSTCLR.
Access:
Read and write
2
Software reset.
This bit is set to 1 by user code to generate a soft-
Function:
This 8-bit register indicates the source of the
last reset event and can be written by user code
to initiate a software reset.
1
0
ware reset.
This bit is cleared by setting the corresponding bit
in RSTCLR. 1
Watchdog timeout.
Automatically set to 1 when a watchdog timeout
occurs.
Cleared by setting the corresponding bit in RSTCLR.
Power-on reset.
Automatically set when a power-on-reset occurs.
Cleared by setting the corresponding bit in RSTCLR.
1
If the software reset bit in RSTSTA is set, any write to RSTCLR that does not
clear this bit generates a software reset.
Table 29. Device Reset Implications
Reset
Reset All
RSTSTA
External Pins to
Kernel
External MMRs
Peripherals
Watchdog
RAM
(Status After
RESET
POR
Watchdog
Software
External Pin
Default State
Yes
Yes
Yes
Yes
Executed
Yes
Yes
Yes
Yes
(Excluding RSTSTA)
Yes
Yes
Yes
Yes
Reset
Yes
Yes
Yes
Yes
Timer Reset
Yes
No
No
No
Valid
Yes/No
Yes
Yes
Yes
Reset Event)
RSTSTA[0] = 1
RSTSTA[1] = 1
RSTSTA[2] = 1
RSTSTA[3] = 1
Rev. 0 | Page 29 of 100
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